FORSYTE - Formal Methods in Systems Engineering

TU Wien Informatik —

Formal Methods in Systems Engineering

	Helmut Veith

	Therese Schwarz

	Andreas Holzer
	Visar Januzaj
	Aleksandr Karbyshev
	Mohammad Khaleghi
	Johannes Kinder
	Stefan Kugele
	Christian Schallhart
	Michael Tautschnig
	Florian Zuleger

	Boris Langer

	Toni Pisjak

Formal Methods for Embedded Systems
Model checking embedded software; Execution time analysis; Model based testing; Runtime verification

Model Checking and Constraint Solving
Malicious code detection; Automated abstraction; Parameterized verification; SAT and constraint solving

Automata, Logic, and Complexity
Mathematical methods for discrete systems; Classification and algorithms for hard problems; Temporal logic and foundations of verification;

News

Recent Publications

2010-05-28

Helmut Veith is a founding member of the Austrian Society for Rigorous Systems Engineering

more news...

2010-02-01

Runtime Verification for LTL and TLTL to appear in ACM Transactions on Software and Methodology (TOSEM)

2010-02-01

Comparing LTL Semantics for Runtime Verification to appear in Journal of Logic and Computation (JLC)

2010-02-01

Semantic Integrity in Large-Scale Online Simulations to appear in ACM Transactions on Internet Technology (TOIT)

2010-06-29

How did you specify your test suite ? to appear in Proceedings of the 25th IEEE/ACM International Conference on Automated Software Engineering (ASE 2010)

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